上网时间: 2013年04月24日? 作者:Rick Merritt? 我来评论 【字号: ? ?小】

关键字:网络处理器? ASIC?

Will ASICs be replaced in comms gear?

Rick Merritt

Stanford’s Nick McKeown sees a new breed of merchant networking processors replacing ASICs in routers and switches over the next decade SAN JOSE, Calif. – Nick McKeown, an engineering professor at Stanford University, expects a new breed of merchant networking processors to replace ASICs in routers and switches over the next decade.

McKeown says he has looked into the future of communication processors “and if you squint hard it looks like RISC for networking.”

McKeown helped kick start the movement toward software-defined networking based on the OpenFlow protocol. Its goal is to enable a new class of software apps that manage gangs of simplified switches and routers.

If the effort succeeds it could ease and lower the cost of running large data centers and business networks. It will also disrupt the current business model based on expensive network gear that uses complex ASICs and proprietary code.

McKeown sees a new breed of merchant chips taking the place of the big ASICs companies such as Alcatel-Lucent, Cisco, Ericsson, Juniper and others design today. The first attempts at creating them likely will emerge over the next two or three years, he said.

In a research effort with Texas Instruments and others, McKeown created a prototype on paper of the new device. It essentially consists of a parsing engine that interprets the increasingly wide set of headers on each packet then pushes the packet into a pipeline of execution units that match patterns in the headers and take actions on them.

“It’s a brute force feed-forward pipe of match and action, match and action,” he said, relating work in a paper now under review for publication.

The paper reports that for 15 percent more silicon area and power such a chip could handle any current or future protocol at the same performance levels as today’s protocol-specific ASICs. McKeown predicts that in a decade the big router and switch players will have replaced their ASICs with such merchant chips and morphed into software companies.

“We’ll look back in 10 years and they will be providing control plane software and apps on top of it,” he said.

Two or three companies are said to be exploring such chips already including startup xPliant and existing players such as TI and possibly Cavium and Mellanox.

“Merchant silicon is one of the prime drivers of this movement,” said McKeown. “The incumbent chip vendors such as Broadcom and Marvell are adding OpenFlow support to their switches already--that’s what they should do, and they have been involved from the start,” he said.

A chicken-and-egg dance

It will be revolution by evolution as the new software and new hardware emerge in a chicken-and-egg dance.

The current 1.x versions of OpenFlow represent a compromise. “Ideally we would have started it as a generic match-and-action flow, but it had to be mapped on to existing chips—the next generation will be more protocol independent,” McKeown said.

Last year, the Open Networking Foundation (ONF) that oversees OpenFlow engaged ASIC makers in a so-called Forwarding Abstractions working group. It aimed to narrow the gulf between what OpenFlow wants to enable and what existing and planned ASIC do.

Now ONF is starting a new effort it calls a chip advisory board. “We will learn from them what’s possible [in silicon], and out of that will emerge what’s possible for the next generation of OpenFlow,” he said

OpenFlow began using content-addressable memories as an intermediary to interface to router and switch ASICs, but the approach limited its functionality. More recently it has used a technique of matching multiple tables.

“The protocol independent version [of OpenFlow] will take awhile,” McKeown said.

An evolving software stack

On the software side, the pieces of the code to enable software-defined networks are still emerging as are the people who will write it.

Startups including Big Switch Networks and Nicira, now part of VMWare, already have their own versions of OpenFlow controllers. Earlier this month, eighteen large comms and software vendors launched Open Daylight, an effort to create open source code for SDN controllers, the APIs for apps that ride on it and maybe more.

Observers expect the giants to jostle over whose code becomes part of Open Daylight. If a solid product emerges they say companies such as IBM will make money selling integration and services using it—but that could be two or three years away.

McKeown uses the metaphor of Posix, a standard set of APIs for what became Linux. It took a decade for the various flavors of the operating system to settle down to a stage that the Posix APIs could be written. The same may be true for the APIs the enable software-defined networking, he said.

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  • 什么是ASIC
  • ASIC(Application Specific Intergrated Circuits)即专用集成电路,是指应特定用户要求和特定电子系统的需要而设计、制造的集成电路。目前用CPLD(复杂可编程逻辑器件)和FPGA(现场可编程逻辑阵列)来进行ASIC设计是最为流行的方式之一,它们的共性是都具有用户现场可编程特性,都支持边界扫描技术,但两者在集成度、速度以及编程方式上具有各自的特点。ASIC的特点是面向特定用户的需求,品种多、批量少,要求设计和生产周期短,它作为集成电路技术与特定用户的整机或系统技术紧密结合的产物,与通用集成电路相比具有体积更小、重量更轻、功耗更低、可靠性提高、性能提高、保密性增强、成本降低等优点。

  • 什么是网络处理器?
  • 国际电子商情提供相关网络处理器技术文章及相关网络处理器新闻趋势,及更新最新相关网络处理器电子产品技术

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